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Publication date Communities Collections Article title Author(s) Journal/Conference
30 May 2017 SERC Institute of Microelectronics Drop Impact Reliability Test and Failure Analysis for Large Size High Density FOWLP Package on Package Zhaohui Chen, Faxing Che, Mian Zhi Ding, David Soon Wee Ho, Tai Chong Chai, Vempati Srinivasa 2017 IEEE 67th Electronic Components and Technology Conference (ECTC)
30 May 2017 SERC Institute of Microelectronics Forming a vertical interconnect structure using dry film processing for Fan Out Wafer Level Packaging Yew Wing Leong, Hsiang-Yao Hsiao, David Soon Wee Ho, Boon Long Lau, Huamao Lin 2017 IEEE 67th Electronic Components and Technology Conference (ECTC)
1 Aug 2015 SERC Institute of Microelectronics Fabrication and Assembly of Cu-RDL-Based 2.5-D Low-Cost Through Silicon Interposer (LC–TSI) Guruprasad Katti, David Soon Wee Ho, Hong Yu Li, Rahul Dutta, Roshan Weerasekera, Ka Fai Chang, Jong-Kai Lin, Vempati Srinivasa Rao, Surya Bhattacharya IEEE Design & Test
1 Sep 2013 SERC Institute of Microelectronics Embedded Wafer Level Packaging for 77-GHz Automotive Radar Front-End With Through Silicon Via and its 3-D Integration Cheng Jin, Siong Chiew Ong, Teck Guan Lim, Ka Fai Chang, Soon Wee Ho IEEE Transactions on Components, Packaging and Manufacturing Technology
1 Feb 2013 SERC Institute of Microelectronics 3-D Packaging With Through-Silicon Via (TSV) for Electrical and Fluidic Interconnections (Pending publish) Navas Khan, Li Hong Yu, Tan Siow Pin, Soon Wee Ho, Vaidyanathan Kripesh, Damaruganath Pinjala, John H. Lau, Toh Kok Chuan IEEE Transactions on Components, Packaging and Manufacturing Technology