Xin Liu; Jun Zhou; Chao Wang; Kah-Hyong Chang; Jianwen Luo; Jingjing Lan; Lei Liao; Yat-Hei Lam; Yongkui Yang; Bo Wang; Xin Zhang; Wang Ling Goh; Kim, T.T.-H.; Minkyu Je, "An Ultralow-Voltage Sensor Node Processor With Diverse Hardware Acceleration and Cognitive Sampling for Intelligent Sensing," in Circuits and Systems II: Express Briefs, IEEE Transactions on , vol.62, no.12, pp.1149-1153, Dec. 2015
Abstract:
An energy-efficient sensor node processor is presented for intelligent sensing in internet of things (IoT) applications. To achieve ultra-low energy consumption and satisfying performance, the proposed processor incorporates an ARM Cortex-M0 RISC core and diverse hardware accelerators, including discrete wavelet packet trans-form engine, FIR filtering engine, FFT engine, and CORDIC engine, to accelerate signal processing tasks. At the architecture level, dual-bus architecture with automatic bus sensing and reconfigurable memory access scheme are proposed. At the circuit level, digitally-assisted cognitive sampling and ultra-low-voltage operation with in-situ timing-error monitoring techniques are employed. When applied to neural spike classification and vehicle speed detection, the proposed SNP consumes only 39 and 29 pJ/cycle, respectively.
License type:
PublisherCopyrights
Funding Info:
Description:
(c) 2015 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other users, including reprinting/ republishing this material for advertising or promotional purposes, creating new collective works for resale or redistribution to servers or lists, or reuse of any copyrighted components of this work in other works.