Cu-Cu is a prefer choice of interconnects as it offered lower electrical resistance, no risk of shorting between the bump and higher reliability as it contains no intermetallic compound as compared to Cu Solder Bump. However, Cu-Cu interconnect required stringent requirements such as Cu bump surface topography, flatness, uniformity and clean bonding surface.
In this paper, a novel Cu-Cu interconnects is illustrated with the use of solder layer surrounding the side wall of the copper pillar. The solder layer offered a possibility of temporary tacking the chip on the wafer and then formed the interconnects through the use of gang bonder. With the tacking and gang bonding process, a higher throughput process can be realized and actively adopted by industry as it offers lower cost of assembly.
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